Latest Molding Solutions for Increased Size of the Advanced Package Size (2.xD/3D Chiplet)

Abstract

In recent years, the demand for upscaling from wafer to panel level has increased as 2.5D/3D chiplets for generative AI(artificial intelligence) and HPC(high performance computing)are becoming larger and larger. To achieve increased I/O (input/output) counts, RDL (redistribution layer) first, high-precision flip chip bonding, and hybrid bonding processes are attracting attention. Initially targeting low- to mid-end products, the panel-level approach is now expanding to applications with high yield (number of components) per panel and replacing conventional WLP(wafer level package). New packaging forms such as 2.5D chiplet integration, in which multiple devices and components are integrated on a single substrate, and 3D mounting, in which devices are stacked vertically, are also attracting attention. These new forms require advanced packaging technologies in molding equipment, and further technological innovation is needed. In this presentation, compression molding and the latest packaging technologies will be introduced from a resin molding perspective for packages that are becoming more complex as the size of advanced semiconductors increases.